About the NNTTF

What is the NNTTF?

NNTTF provides fabless companies and design houses with engineering, pre-production test and characterisation services. NNTTF is accessible through the web with leading edge capabilities addressing the most complex testing and IP validation challenges such as mixed-signal and high-end digital integrated circuit (IC) technologies as well as other emerging technologies.

NNTTF's charter is to enable start-ups, fabless companies and integrated device manufacturers to access specialized capabilities without making a huge investment in very expensive capital equipment. Because Intellectual Property protection is crucial in today's market, NNTTF offers users the chance to "own" a $15M state of the art testing facility for the duration of an IP validation project.

The National Networked TeleTest Facility for Integrated Systems

NNTTF was created in 2002 as a Major National Research Facility (MNRF) building up upon an existing Research Infrastructure Equipment & Facilities Scheme (RIEF) funded project based at Edith Cowan University.

The facility operates as a virtual centre spanning Australia and accessible Internationally it consists of the facility node at ECU in Perth and 5 remote nodes in Brisbane (Griffith University), Sydney (University of Sydney), Melbourne (Victoria University), Adelaide (The University of Adelaide), and the second Perth node at the University of Western Australia.

The TeleTest Network provides state of the art environment for the electronics and microelectronics research and the industry community around Australia and internationally to test and prototype very large scale integrated (VLSI) circuits and other System-On-Chip (SOC) devices, prior to moving to the manufacturing stage.

Remote Access

Remote users can access the central workstation via LAN/WAN. A World Wide Web interface with a booking (scheduling) system provides the users with a convenient and simple interface to the testing environment. The users can book an off-line session, usually in order to prepare the setup of the tested device, pin configuration, timing, levels, test vectors, develop and debug their test-flows, or an on-line session, where they remotely control the chip tester and their Device Under Test is placed on the testhead by the personnel of the central node.

Features of node interaction in the tele-testing entail the generation of test vectors in remote workstation. The steps to follow would simply be to logging in followed by downloading test vectors into central workstation. It is possible to see programs running on the central workstation, seeing includes operations such as initialisation and monitoring. It is planned that the testing facility will be equipped with a robotic arm allowing automatic chip replacement in the DUT interface, thus allowing for remotely controlled statistical testing on a sample of integrated circuits.

The Equipment

The equipment is an Agilent 93000 SOC series model P1000 vlsi test configuration of 512 pins, with a combination of pins having maximum i/o data rate 1000 Mbit/s, and a maximum clock rate of 625 MHz. Sixteen network processor channels (NP2500 option), included in the target setup allow testing of communication subsystems at throughputs of up to 2.5 Gbps. The tester is also equipped with a high-resolution analog waveform generator, a high-speed digitiser and a high-resolution digitiser.

Education

The tele-testing facility is providing the potential users, including postgraduate students, with the training courses dealing in detail with the use of the agilent 93000 tester. Currently, the basic digital test course is available, the advanced digital test and the mixed-mode test courses will be available shortly. Completing the basic course provides the trainees with the competence in setting up the DUT (Device Under Test), Functional Testing, Parametric Testing, Developing the Testflow, and Test Execution. The training consists of lecture part and related laboratory sessions.

NNTTF Brochure

Download our brochure. (PDF)

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